What’s all this Error Fingerprint Stuff?
Since the emergence of 400 Gigabit Ethernet (GbE) around 5 years ago, we have seen PAM-4 modulation replace NRZ on both optical and electrical interfaces. We now see a broad and healthy ecosystem building for 400 GbE, and even 800 GbE, using PAM-4 signaling. In fact, we are even seeing the first 100 Gb per lane systems based on 53 Gbaud PAM-4. The conventional troubleshooting and validation tools built up over decades and used at 100 GbE and below based on NRZ, are no longer suitable for the PAM-4 world.
PAM-4 modulation is replacing NRZ on both optical and electrical interfaces
PAM-4 Brings Increased Testing Complexities
PAM-4 links use forward error correcting (FEC) coding to protect the data transmitted over the PAM-4 electrical and optical interfaces, as the ‘raw’ links will always have a background error rate. Perhaps it can be below 10e^6, but the errors can be there.
With legacy diagnostic tools used in NRZ, you simply counted the error errors and tracked if the bias was towards errored 0s or 1s. With PAM-4 based links, the FECs and the far more complex DSP based SERDES required at PAM-4, simple error counting is no longer helpful and indeed can be misleading (if the error rate is within the FEC capabilities we should never get an error!!! – wrong!).
PAM-4 testing using VIAVI ONT-800
Error Fingerprinting is the Key
Error fingerprinting is the key to troubleshooting PAM-4. Detailed information on the precise signature of the errors is critical: when they occur, how they occur, which symbols and transitions they impact, is it an isolated error or a burst, is it a bit slip? All this information is required to accurately understand the nature of the error, and in turn understand the origin and how to correct the issues.
The VIAVI ONT family has a wide range of tools in the advanced error analysis applications, and these can be combined with other tools like dynamic skew to quickly dig into the error causes and the true FEC margin the link has.
ONT chassis with high-performance PAM-4 Electrical Adapters
Key Rules for PAM-4 Troubleshooting
Remember these simple rules when starting out with PAM-4 troubleshooting:
- Simple BER tools cannot efficiently validate and debug modules
- They offer NO insight into the root cause, and offer very little useful information (you probably already know “you have bit errors”)
- They can give misleading data on performance margin
- Advanced error analysis tools such as bit slip analysis, error burst count and gap, error distribution, and PAM-4 transition analysis quickly give deep insight into the true error behavior, and can be intelligently combined with stressing applications such as dynamic skew and clock variation. These applications uncover and validate performance of DSP based equalizers and the supporting firmware.
- The applications need to be closely integrated so the cause/effect can be clearly seen
- The ability to quickly separate deterministic issues, like bit-slips from bursts, is key in troubleshooting annoying and challenging events like link-flaps
- Start fingerprinting as early as possible – the VIAVI ONT can be used at the earliest chip stage by using high-performance PAM-4 electrical adapters – even before board design is started
VIAVI Can Help!
Find out more about error fingerprinting using the VIAVI ONT by contacting your local VIAVI sales representative. And please read our other recent blogs: Integrated Testing Simplifies DCO Complexities, and What’s All the 800G Stuff? Evolution, Revolution…or Both?
