As module bitrates increased from 100Gbs so too did the complexity of the modules. Starting with DSP based signal conditioning and clock recovery and onwards to pluggable coherent optics, PAM-4 and CMIS. With this new level of complexity, we had to take a very different approach to module-to-pluggable optics development, debugging and validation. Specifically, the three key domains of module development, debugging and validation need to be addressed:

  • High speed electrical interface – high speed SERDES
  • Optical interface – lasers, photodiodes
  • Module management – control over I^2C interface

Historically, each of those areas would be debugged and validated in a somewhat isolated manner. The signal integrity (SI) and H/W teams would work on the high-speed electrical host interface, the photonic engineers would work on the optics while the S/W team would develop and debug the module microcontroller. This approach worked well up to 100G. But with the DSP and complexity we have now with pluggable coherent and 400G PAM-4 all these domains must be developed, debugged, and validated in a closely orchestrated matter.

At the heart of this is the DSP based signal conditioning and firmware. It impacts the behaviour of the photonics and host interface – from how a module responds to photonic loss of signal to how the host electrical interface is equalized– with all intimately coupled to the DSP. As a result, a complete approach is needed to successfully debug 400G class pluggables. Standalone I^2C debuggers and benchtop BERTs are not the right tools for the 400G world.

The electrical interface – an intelligent BERT which should support framed and unframed– must be closely coupled with module management CMIS class tools. In turn, they need to orchestrate the photonic domain events and impairments like OSNR and polarization scrambling.

VIAVI has been at the leading edge of pluggable optics test and measurement for more than a decade and our ONT 800G and MAP product lines offer integrated, multi-domain module T&M tools ready for 400G and above. Our TraCol application brings msec module management and control resolution, coupled with full host electrical interface and application orchestration. It can also support close coupling of photonic impairments to give full control and visibility in all domains.

Bottom line: Don’t try to debug complex DSP-based modules with last-generation basic tools, counting bit errors is of no help at beyond 100G. Use the ONT integrated approach with insight and wise applications and become at one with your module. This is the true path to Zen!

To start on your own path to Nirvana, contact a VIAVI representative today.

About The Author

Paul Brooks currently leads the strategy for the VIAVI Lab and Production business unit. After a career in the Royal Navy as a weapons officer he spent time in a variety of roles with the communications test and measurement industry with a particular interest in enabling the high-speed Ethernet ecosystem. He holds a PhD in opto-electronics from the University of Southampton and lives in Southern Germany.

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